Skip to main content

Loading page…

Cache Line — Glossary | LowLevelCraft

Search

Back to Glossary

Glossary Term

Cache Line

The smallest unit of data transferred between cache and main memory, typically 64 bytes on x86.

When you access one byte, the CPU fetches the entire cache line. This is why sequential access is fast and random access is slow. False sharing occurs when two cores modify different variables on the same cache line.

Related Terms

Used In

Implement All Logic Gates Using Only NAND Build Half-Adder and Full-Adder from Gates Build a 4-bit Ripple-Carry Adder Build 1-bit Multiplexer and Demultiplexer Build SR Latch and D Flip-Flop How Memory Actually Works CPU Caches and Why Layout Matters