Understand CISC vs RISC Trade-offs with Benchmarks

Real x86 CPUs from Skylake onward internally decode CISC instructions into RISC-like micro-ops, exactly the convergence this benchmark reveals, while Apple's shift to ARM64 in Apple Silicon leaned on RISC's simplicity for performance-per-watt. GCC and LLVM maintain separate code generation strategies for x86 versus ARM/RISC-V targets precisely because of the density-versus-instruction-count trade-off you measure here.