Implement a NES CPU (6502): All Opcodes, Addressing Modes, Flags

Topic Overview

The NES 6502 CPU

The Nintendo Entertainment System runs a Ricoh 2A03, a 6502 derivative at 1.79 MHz (NTSC). Emulating it means accurate fetch-decode-execute, memory maps, and cycle counting for the PPU and APU.

Address Space and Registers

6502 features:

• A, X, Y accumulators/index registers (8-bit)
• SP stack pointer on page 0x0100-0x01FF
• PC program counter
• P status with N, V, B, D, I, Z, C flags

Memory map slices:

• \`0x0000-0x07FF\` RAM (mirrored)
• \`0x8000-0xFFFF\` cartridge PRG-ROM
• PPU and APU registers via memory-mapped I/O

For example, opcode \`0xA9\` (LDA immediate) loads the next byte into A and sets Z/N flags.

Cycle accuracy matters: many PPU tricks depend on the CPU running a known number of cycles per instruction.

Design Notes

Read the memory map through a bus function so mapper chips can redirect PRG-ROM windows later. Hard-coding `0x8000` reads works for NROM only; MMC1 and UxROM need bank switching hooks.

For This Exercise

This exercise asks you to implement a 6502 CPU core with correct addressing modes for a starter opcode set. You will fetch from the NES memory map and update flags the way test ROMs expect.

You will use the same mental model here when reading production interpreter source later in the track. Sketch one concrete input on paper, predict the outcome, then confirm with code. That discipline catches logic errors early and makes debugging far faster when you extend the implementation in follow-on tasks.

Your Task

Implement the NES CPU, a MOS 6502 without decimal mode: registers A, X, Y, SP and P, a 64 KiB address space, the stack at $0100-$01FF, the official instruction set with all addressing modes, exact flag behaviour, and cycle counting, including page-crossing penalties. Print a nestest-style trace, the way emulator authors validate their CPUs.

Input

Whitespace-separated tokens. ; starts a comment.

• XX: a program byte (2 hex digits), loaded from the origin upward.
• org ADDR: the load and start address (hex, before the first byte; default 0600).
• mem ADDR XX XX ...: preloads memory (to the end of the line).
• dump ADDR N: prints N (1..16) bytes after the run.
• trace off.
• cycles N: stops before an instruction once the count ≥ N (1..10000000, default 100000).
• run: runs, then resets everything to defaults. The end of input runs any pending program.

The power-on state is A = X = Y = 0, P = $24, SP = $FD, and the cycle count starts at 7 (the reset sequence).

Instructions

• Loads, stores and transfers: LDA LDX LDY STA STX STY TAX TAY TXA TYA TSX TXS.
• Arithmetic and logic: ADC SBC AND ORA EOR CMP CPX CPY BIT, INC DEC INX INY DEX DEY, ASL LSR ROL ROR.
• Control flow: BPL BMI BVC BVS BCC BCS BNE BEQ, JMP JSR RTS.
• Stack and flags: PHA PLA PHP PLP, CLC SEC CLI SEI CLV CLD SED, NOP.
• BRK stops the run and is not executed.

Every official opcode and mode is used. Semantics:

• ADC: A + M + C. SBC is ADC with ~M. V is set when the operands have the same sign and the result's sign differs.
• Compares: C = reg ≥ M, and N/Z come from reg - M. BIT: Z = (A & M) == 0, with N and V copied from M bits 7 and 6.
• Stack: PHP pushes P | $30. PLP loads (pulled & ~$10) | $20. JSR pushes the address of its own last byte, and RTS adds 1.
• Wrapping: zero-page indexing wraps within page 0, including ($zp,X) and ($zp),Y pointers. JMP ($xxFF) reads its high byte from $xx00, the 6502 bug.

Cycles

• Penalty: + adds 1 when the indexed address is on a different page from the base.
• Other instructions: JMP abs 3 and ind 5, JSR and RTS 6, PHA and PHP 3, PLA and PLP 4, all implied ones 2.
• Branches: 2, +1 if taken, +1 more if the target is on a different page from the next instruction.

Output

cCopy
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• Trace lines show the state before each instruction (%04X %-8s %-13s A:.. X:.. Y:.. P:.. SP:.. CYC:n), including the BRK.
• Operand forms: #$05, $10, $10,X, $1234,Y, ($1234), ($10,X), ($10),Y and A. Branches show the target address.
• Flags print as NV-BDIZC, uppercase when set.
• Other endings: illegal opcode $XX at $XXXX after … and halted: cycle limit N reached.
• Errors: bad byte: X, no program, dump: ADDR 1..16, cycles: 1..10000000, org must come before the program.

Example

Input:

cCopy
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Output:

cCopy
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Requirements

1. Drive decode from a 256-entry table of {mnemonic, mode, cycles, page penalty}. Compute the effective address once per instruction, then execute.
2. Count the cycles exactly. The CYC column is how you diff against a reference log.

Hidden tests cover signed overflow, SBC borrow, compare and BIT flags, a page-crossing abs,X read, the JMP ($10FF) bug, same-page and cross-page taken branches, ($zp),Y with a page cross, zero-page index wraparound, read-modify-write on memory, illegal opcodes and the cycle limit.