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Master the fundamental concepts of arm assembly (aarch64) through this focused micro-challenge.
You have read the whole brief, and the concepts above stay free on every task. Writing and running the code needs a plan.
Three hints are available for this task, revealed one at a time inside the code workspace so you can struggle productively before seeing them.
Every task includes starter code, theory, and hidden tests so you can implement and verify locally in the browser.
How it worksNEON shares v0-v31 (128-bit) for SIMD and scalar FP. ffmpeg, libvpx, and Apple's image pipelines maintain thousands of lines of hand-written NEON because auto-vectorization misses on alias analysis. One fadd v0.4s, v1.4s, v2.4s adds four floats in parallel.
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Lane suffixes:
Loads/stores use ld1/st1 with brace syntax; alignment still helps DRAM throughput.
For this exercise, you will add two four-float arrays with NEON and write results back. This task asks you to keep addresses 16-byte aligned where possible, because unaligned vector loads trap or slow down on some cores and silently hurt battery life on mobile SoCs.
Keep the relevant man page, ABI doc, or Rust reference chapter open while you work. When your output disagrees with the reference implementation on the same machine, the mismatch is usually an alignment rule, an off-by-one terminator, or a register slot you misread in GDB. Skim the official documentation for the tool or ABI named in the exercise; the prose changes, but register roles, syscall numbers, and ownership rules stay stable across releases. Treat each failure as a contract test: the CPU, kernel, and borrow checker enforce rules whether or not the tutorial mentioned them explicitly.
Add four 32-bit integers to four others with one NEON instruction. Write in AArch64 assembly:
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ld1 {v0.4s}, [x0] (four 32-bit lanes), add with add v0.4s, v0.4s, v1.4s, and store with st1 {v0.4s}, [x2].int: 2147483647 + 1 is -2147483648.stp/ldp), because the harness keeps its own state there. A function that calls another with bl must save x30 (the return address) first. The vector registers v0-v7 and v16-v31 are caller-saved.The harness reads both arrays, calls vec_add4, and prints out.
Eight integers: a[0..3], then b[0..3].
The four sums separated by spaces: 6 8 10 12 for 1 2 3 4 5 6 7 8.
ARM code is not run on this site yet. Submit completes the task once your code assembles for AArch64 and still declares and defines every .global symbol in the starter. The tests below show exactly what a correct program prints, so you can run it yourself: aarch64-linux-gnu-as, aarch64-linux-gnu-ld and qemu-aarch64, or natively on an ARM Linux machine.