Loading page…
Master the fundamental concepts of arm assembly (aarch64) through this focused micro-challenge.
You have read the whole brief, and the concepts above stay free on every task. Writing and running the code needs a plan.
Three hints are available for this task, revealed one at a time inside the code workspace so you can struggle productively before seeing them.
Every task includes starter code, theory, and hidden tests so you can implement and verify locally in the browser.
How it worksAArch64 is classic RISC: arithmetic does not target memory like x86 add [mem], eax. You ldr into a register, compute, then str back. Compilers generate clean array walks because post-increment addressing exists for exactly that job.
| Op | Width | Example |
|---|---|---|
| ldr/str | 64-bit | ldr x0, [x1, #8] |
| ldrw/strw | 32-bit | ldrw w0, [x1] |
| ldrh/strh | 16-bit | halfword |
| ldrb/strb | 8-bit | byte |
asmLoading…
Pre-index [x1, #8]! adjusts the base before the access; post-index [x1], #8 after.
For this exercise, you will copy and transform a small array using multiple addressing modes. This task asks you to demonstrate post-index walks, because that idiom is what makes AArch64 loop codegen shorter than equivalent x86 for array kernels.
Keep the relevant man page, ABI doc, or Rust reference chapter open while you work. When your output disagrees with the reference implementation on the same machine, the mismatch is usually an alignment rule, an off-by-one terminator, or a register slot you misread in GDB. Skim the official documentation for the tool or ABI named in the exercise; the prose changes, but register roles, syscall numbers, and ownership rules stay stable across releases.
ARM is a load/store architecture: arithmetic only touches registers, so every memory access is an explicit load or store. Write two functions over an array of four 32-bit signed integers:
asmLoading…
ldrsw loads a 32-bit word and sign-extends it to 64 bits, so negative ints stay negative. A plain ldr w0 would zero-extend them.sum4, walk the array with post-indexed addressing, ldrsw x3, [x1], #4, which loads and then advances the pointer by one element.stp/ldp), because the harness keeps its own state there. A function that calls another with bl must save x30 (the return address) first.The harness stores the four integers, calls both functions, and prints the results.
Four integers.
cLoading…
for 10 20 30 40.
ARM code is not run on this site yet. Submit completes the task once your code assembles for AArch64 and still declares and defines every .global symbol in the starter. The tests below show exactly what a correct program prints, so you can run it yourself: aarch64-linux-gnu-as, aarch64-linux-gnu-ld and qemu-aarch64, or natively on an ARM Linux machine.