Understand Dynamic Recompilation (Dynarec) for Emulation Speedup

Topic Overview

Dynamic Recompilation

Dynamic recompilation (dynarec) translates guest machine code to host machine code at runtime, caching translated blocks. It powers high-performance console emulators when interpretive CPUs are too slow.

Basic Block Cache

Workflow:

1. Identify a guest basic block entry (guest PC)
2. Translate instructions until a branch or end
3. Store host code pointer in a hash map keyed by guest PC
4. On revisit, jump directly to cached host code

Challenges beyond template JIT:

• Guest registers mapped to host registers
• Self-modifying code and cache invalidation
• Direct block linking to skip dispatcher on taken branches

For example, translating a MIPS block from a PS1 emulator into x86-64 once, then reusing it for every loop iteration, removes interpret overhead entirely.

Profile hot PCs first; cold code can stay interpreted.

Design Notes

Invalidate cached blocks when guest code writes to memory that might contain instructions. Self-modifying code and JIT caches interact badly if you assume ROM is always read-only.

For This Exercise

This exercise asks you to document or prototype a dynarec block cache for a simple guest ISA. You will explain block translation, caching by program counter, and invalidation when guest code changes.

Your Task

Model the heart of a dynamic recompiler (QEMU's TCG, Dolphin's JIT) for a tiny guest ISA:

• a dispatcher that looks up guest PCs in a translation cache;
• basic-block translation;
• block chaining, which patches a block's exit to jump straight to its successor;
• invalidation when the guest overwrites code it already translated.

Since we can't emit host code here, "executing a translation" just runs the block's instructions. Everything else follows a real dynarec's bookkeeping, and the statistics show why chaining matters.

Input

cCopy
Loading…

TARGET is a label or an instruction index. # starts a comment. Arithmetic wraps at 32 bits, and blt is signed.

Rules

• Translation: a block starts at a PC and runs through the first beq/bne/blt/jmp/halt, 16 instructions, or the end of the code, whichever comes first. It takes the lowest free slot in a 64-entry cache table. Print translate @PC: N instruction(s) [START-END]. Blocks may overlap: a jump into the middle of a block translates a new block there.
• Dispatch: at the start and at every unchained exit, look the PC up among the live blocks by start address. A miss translates a new block.
• Exits: each block has a jump exit (a taken branch or jmp) and a fall exit (the next instruction). After the block, if that exit is linked, go straight to the linked block (a chained jump: no lookup). Otherwise, dispatch. Then, with chaining on, link the exit to the found block and print chain @FROM.jump|fall -> @TO.
• poke T, V: writes V into instruction T's immediate and prints poke T = V. Every live block covering T is invalidated, in slot order, printing invalidate @START (write to T), and every link into it is cleared. If the running block itself died, it stops right after the poke and dispatches the next instruction, without linking.
• Ending: halt ends the run. After 100000 guest instructions, the run stops.

Output

cCopy
Loading…

• Summary: the first word is stopped at the 100000-instruction limit instead of halted when the limit ends the run. The translation and invalidation counts use the singular for 1.
• Errors:
  • instruction N: cannot parse "TEXT" (the instruction still takes its index)
  • instruction N: unknown target X
  • code has errors (for run)
  • no code
  • unknown command X

Example

Input:

cCopy
Loading…

Output:

cCopy
Loading…

Requirements

1. Chaining must bypass the dispatcher completely. That is the optimization being measured.
2. Invalidation must also unchain the blocks that link into the dead block, or a stale link would run old code.

Hidden tests cover self-modifying code that rewrites a loop bound in another block, a block that invalidates itself, re-running with already-patched code, chaining turned off, the step limit, and program errors.